1. Field of the Invention
Exemplary embodiments of the present invention relate to an FPGA apparatus and a method for protecting bitstreams, and particularly to an FPGA apparatus and a method for protecting bitstreams which are capable of preventing bitstreams from being illegally acquired and modulated through the inclusion of a device for authenticating and encrypting/decrypting bitstreams used to design a field programmable gate array (FPGA).
2. Description of Related Art
Generally, an FPGA has a slower speed than that of an application-specific integrated circuit (ASIC), but has advantages such as a short development period, rectification of errors onsite, low initial development cost, and the like. As a result, FPGAs have been used in various applications, and technology related thereto h as continuously developed. FPGAs are broadly classified into static random access memory (SRAM)-based products and flash memory-based products. Currently, SRAM-based products occupy most of the market.
The FPGA is programmed by loading bitstreams, which are data for setting the design in the FPGA, and the structure of the SRAM-based FPGA has a volatile nature, and thus the design set in the FPGA disappears when the supply of power is cut off. Therefore, current FPGA products are operated in a manner such that an electrically erasable programmable read-only memory (EEPROM) or non-volatile memory such as flash memory is installed outside the FPGA to store bitstream information, and the FPGA is automatically reprogrammed whenever power is supplied.
In order to prevent the bitstream information written in the external non-volatile memory from being illegally acquired, current SRAM based FPGA products use method for protecting bitstreams in which encrypted bitstreams are stored in non-volatile memory, and when power is supplied, the bitstreams are decrypted using a decryption logic circuit disposed in the FPGA, and the decrypted bitstreams are then transferred to a logic setting memory and used for programming.
The decryption logic circuit in the FPGA uses a circuit for processing a commercial standard block encryption algorithm, such as a data encryption standard (DES) or an advanced encryption standard (AES), which is implemented as a fixed circuit during a manufacturing process, unlike general programmable components in the FPGA and thus cannot be accessed or changed by a user.
Further, a key storage space for decryption has key information, which is required to decrypt the encrypted bitstreams, stored therein. When the storage information is exposed, the bitstreams can be acquired in plain text form. The storage information of the space can be written in peripheral devices (often PCs or notebooks) but cannot be read therefrom.
Meanwhile, the method for protecting bitstreams for current FPGA products using encryption/decryption as described above provides confidentiality, in that bitstream data are protected from illegal acquisition or copying, but does not guarantee the integrity of the encrypted bitstream data.
That is, when attackers arbitrarily modulate the encrypted bitstreams for the purpose of making the corresponding FPGA unable to provide service or the like, the decryption logic circuit in the FPGA decrypts the modulated bitstreams and transfers the decrypted bitstreams to the logic setting memory, whereby the FPGA may be programmed with an abnormally modulated design.
A case was recently announced in which decryption key information stored in a key storage space for decryption was successfully acquired by applying a power analysis attack, which is a sub-channel attack mechanism that is mainly targeted to smart cards, to SRAM-based FPGA products to acquire and analyze information about power consumption, which is generated while the decryption logic circuit in the FPGA is operated, which happens every time the FPGA is programmed.
Therefore, in order to protect a semiconductor design and secure the safety of a system, a need exists for a method or an apparatus for more securely protecting the FPGA bitstreams against currently known attack methods.